This invention relates to circuits for detecting sync codes in a stream of digital data and, in particular, to sync detect circuits for two-stage sync codes.
The transmission of digital data and the accurate reception thereof requires the synchronization of local clocks or timing sources with the received data at the receiving station. Therefore, most transmissions of digital data have incorporated therein sync codes so that the receiving station may implement a synchronization operation upon detection of the sync code.
The synchronization codes used are often very complex and thus require an appropriate amount of complex circuitry for their proper detection, and in some cases the synchronization codes may be periodically changed to provide secured transmissions of the digital data.